http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-S5496379-A
Outgoing Links
| Predicate | Object |
|---|---|
| assignee | http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_c0e3687553467f6b262e5c974ef315c4 http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_1aeb547e41bcced0c8569159a97514be |
| classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-088 |
| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-112 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-088 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G11C17-00 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-792 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-788 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-8247 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-8246 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G11C16-04 |
| filingDate | 1976-02-02-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor | http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_7a272113c7bbf8398b007b63336effc1 |
| publicationDate | 1979-07-30-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | JP-S5496379-A |
| titleOfInvention | Semiconductor memory device |
| abstract | PURPOSE:To obtain a memory device of excellent performance by unifying the semiconductor memory possessing the nonvolatile trapping center and the standard MISFET in the series connection. CONSTITUTION:SiO2 thin film 2 is formed selectively at the gate region on the (100)-face of P-type Si1, and then insulator film 3 is coated through the reaction between SiH4 and NH4OH, with the Si semiconductor set as the trapping center of the positive hole and the electron. Then the gate electrode is attached. Thus, serial connected substance 22 of FET20 incorporating the trapping center in the gate insulator film is formed to standard MISFET21. The carrier is injected from the substrate of the gate electrode via the tunnel effect or the avalanche effect to perform trapping centering on the nonvolatile charge trapping center, and furthermore the trapped carrier turns on or off the channel right under the carrier. At the same time, the RAM function is secured. In this constitution, both the writing and reading is extremely easy with reduced number of wiring, thus ensuring production of a high-density memory being collected into the matrix array. |
| priorityDate | 1976-02-02-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 25.