| abstract |
(57) Abstract: An object of the present invention is to provide a codec having a DSP capable of continuously performing a plurality of algorithm processes without being limited by a memory capacity. A DSP 10A included in a codec 2 includes 1 A RAM 40 for storing a program in units of block programs obtained by dividing one program, a RAM 30 for storing data used when executing a block program in units of data blocks obtained by dividing one data, and a RAM 3 A DSP core 50 that executes the block program in the RAM 40 using the data block in 0, and each time the execution of one block program by the DSP core 50 is completed, DXMAU 60 which newly acquires a block program from the outside and stores the block program in RAM 40 And |