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classificationIPCInventive http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G11C16-02
filingDate 1998-02-27-04:00^^<http://www.w3.org/2001/XMLSchema#date>
inventor http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_2a578d92fc5bc66f14faed17a2d94c96
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_1df34b4d1d815407cf016f22e220a0f7
publicationDate 1999-01-29-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber JP-H1125682-A
titleOfInvention Multi-valued memory and semiconductor storage device
abstract [PROBLEMS] To provide a multi-value storage type nonvolatile storage device capable of minimizing an increase in circuit scale and realizing highly accurate writing, reading and erasing operations in a short time. SOLUTION: The threshold value of a memory cell is set to three or more levels, and the level of a word line is changed to two or more levels to read out a memory cell, so that two bits or more of data can be stored in one memory cell. In a nonvolatile storage device configured to store, a binary data register (REG1, REG2), a data conversion logic circuit (11) for executing a predetermined operation on a plurality of bits of the input data and converting it to multi-valued data according to a combination thereof, An inverse conversion logic circuit (14) for converting the value data into the original binary data is provided.
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http://rdf.ncbi.nlm.nih.gov/pubchem/patent/EP-1372157-A1
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-9263473-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-6965525-B2
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