| abstract |
PROBLEM TO BE SOLVED: To easily and inexpensively measure a parasitic resistance of a capacitor in a DRAM. The capacitor parasitic resistance measurement circuit includes a first N-channel MOSFET Tr1 having a source electrode Vs1, a drain electrode Vd1, and a gate electrode Vg1, a source electrode Vs2, a drain electrode Vd2, and a gate electrode Vg2. A second N-channel MOSFET Tr2 and a capacitor C, and a first N-channel MOSFET A second N-channel MOSFET is connected to the gate electrode Vg1 of r1. Source electrode Vs2 of Tr2 and one terminal Vb of capacitor C Are electrically connected to each other. |