http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-H11161615-A

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filingDate 1997-11-25-04:00^^<http://www.w3.org/2001/XMLSchema#date>
inventor http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_c09ed3bdbdea888231b42a8245b5cca7
publicationDate 1999-06-18-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber JP-H11161615-A
titleOfInvention Control instruction processing unit
abstract (57) [PROBLEMS] To reduce the number of signals transmitted and received between a dedicated processor and a general-purpose μP by executing a relatively complex POL instruction by a special-purpose processor while using a multiprocessor system with two processors. To reduce the load on the system and increase the processing speed. SOLUTION: An instruction execution control section EXE (2-8) and a DEX (2-20) are mounted on a dedicated processor shown in FIG. 2 as a whole. And execute the interface MP A POL emulator mounted on a general-purpose μP (not shown) connected to the IF (2-1) executes a POL instruction other than the POL instruction executed by the EXE and the DEX, XE and DEX are managed as a whole.
isCitedBy http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-2009116445-A
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-2002055813-A
priorityDate 1997-11-25-04:00^^<http://www.w3.org/2001/XMLSchema#date>
type http://data.epo.org/linked-data/def/patent/Publication

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Total number of triples: 32.