http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-H10323020-A
Outgoing Links
| Predicate | Object |
|---|---|
| assignee | http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_1af8df51ce24ca931ae718fb747f6aa0 |
| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H02M3-00 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H03K7-08 |
| filingDate | 1997-05-21-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor | http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_6ec8af59b8657cc9fd58152588e11e82 |
| publicationDate | 1998-12-04-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | JP-H10323020-A |
| titleOfInvention | PWM signal output extension method |
| abstract | (57) [Problem] To provide a PWM signal output expansion method capable of expanding the number of output PWM signals while suppressing an increase in circuit scale. SOLUTION: In the four-output PWM signal generation device, the maximum value of PWM output, adder carry latch, adder operation result latch, analog comparator, ON width, OFF width, ON width is compared with the two output PWM signal generation device. Are added two by two. 2-output P In the WM signal generator, the signal ¢ / 2, which is obtained by dividing the base clock い た used as the clock of the free-run counter 26 by さ ら に, is further divided into two to obtain a signal ¢ / 4. / 4 is used as the clock of the free-run counter 26. SUM1O generated by the timing generation circuit 53, The output period of the H level of the SUM2O, SUM3O, and SUM4O signals is time-divided within one cycle of the signal ¢ / 4 as a reversible time region of four PWM signal outputs. |
| isCitedBy | http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-2008306803-A |
| priorityDate | 1997-05-21-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 35.