| Predicate |
Object |
| assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_9fc0a00eab3a757e8324b1e887d7ba97 |
| classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2924-0002
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76835
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2221-1031
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2221-1036 |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76885
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76828
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L23-5329
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-7682
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76834
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L23-5222
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-768
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76808
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76807 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-318
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-316
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-768
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L23-532
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-28
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L23-522 |
| filingDate |
1997-10-06-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_d0a9bbf26954bca5ffc0ee2c21c73629
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_a6651f5ae1222aac7dcae7f6d6c86245
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_525f1d7ba5dc6f7b86b5eb7150e8c1b7 |
| publicationDate |
1998-05-06-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
JP-H10116907-A |
| titleOfInvention |
Method for forming semiconductor device |
| abstract |
(57) Abstract: An integrated circuit interconnect structure including a dielectric layer having a low dielectric constant, capable of suppressing a decrease in mechanical strength and improving heat dissipation. An interconnect structure having a low dielectric constant dielectric layer is formed in an integrated circuit. In one embodiment, a portion of silicon dioxide layer 18 adjacent conductive interconnect 21 is removed to expose a portion of silicon nitride etch stop layer 16. A dielectric layer 22 having a low dielectric constant is then formed over the conductive interconnect 21 and the exposed portions of the silicon nitride etch stop layer 16. A portion of the dielectric layer 22 is then removed exposing the top surface of the conductive interconnect 21 leaving a portion of the dielectric layer 22 between adjacent conductive interconnects 21. The resulting interconnect structure is a conductive interconnect 2 It has low crosstalk between 1 while it is a disadvantage of the prior art. Low heat dissipation and large mechanical stress can be avoided. |
| isCitedBy |
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-2011181898-A
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-2009506576-A
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-2002522923-A
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/KR-101458038-B1
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-2010512002-A
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-10515801-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-2013026347-A
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-H1154502-A
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-2013197407-A |
| priorityDate |
1996-10-07-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |