http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-H0961498-A
Outgoing Links
| Predicate | Object |
|---|---|
| assignee | http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_5547f741b25666fc4ae5195cf71a979b |
| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H03M9-00 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G01R31-28 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H03K19-00 |
| filingDate | 1995-08-30-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor | http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_246529bf3b254d4193a3957285caa0e8 |
| publicationDate | 1997-03-07-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | JP-H0961498-A |
| titleOfInvention | Semiconductor integrated circuit |
| abstract | (57) Abstract: A boundary scan register SAMPL without creating a test pattern by an internal logic circuit. A semiconductor integrated circuit capable of confirming the E-mode function is realized. A boundary scan included in the present invention The register is IEEEStd. 1149.1 SAMPLE mode function confirmation data DS, selector 1 for selecting either parallel input PI of internal logic circuit, output of selector 1 and scan output of previous boundary scan register A selector 2 which inputs data and selects and outputs one of them, and a flip-flop 3 which outputs data synchronized with the clock signal T1. And a flip-flop 4 for outputting data synchronized with the clock signal T2, and a selector 5 for selecting and outputting any one of the output of the flip-flop 4 and the output of the selector 1. And is configured. |
| priorityDate | 1995-08-30-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
| Predicate | Subject |
|---|---|
| isDiscussedBy | http://rdf.ncbi.nlm.nih.gov/pubchem/compound/CID7156993 http://rdf.ncbi.nlm.nih.gov/pubchem/substance/SID426135032 |
Total number of triples: 14.