http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-H09270431-A
Outgoing Links
| Predicate | Object |
|---|---|
| assignee | http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_294881271413951a95f284b588a68e66 |
| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-732 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-73 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-8228 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-265 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-331 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-082 |
| filingDate | 1996-03-29-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor | http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_bc216c0a848886db158016369372ca01 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_4d56c00ee0b494ac82f7e01472031bf6 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_3b22daa7a2c6b4850e42419945454b69 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_b100bdb7f7498446220a8402211ca915 |
| publicationDate | 1997-10-14-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | JP-H09270431-A |
| titleOfInvention | Method for manufacturing semiconductor device |
| abstract | (57) Abstract: A high-performance bipolar transistor can be manufactured by preventing thickening of an n-type epitaxial layer, and the yield of the high-performance bipolar transistor can be improved to suppress cost increase. It is desired to provide a method for manufacturing a semiconductor device that can obtain a bipolar transistor having a low resistance. A method of manufacturing a conductor device in which a buried collector region is formed by ion-implanting an impurity having a concentration peak into a semiconductor substrate 11 to manufacture a bipolar transistor. After performing the ion implantation to form the buried collector region, an annealing process for recovering the defects caused by the ion implantation is performed, and then the base region is formed. Annealing to recover defects caused by ion implantation High-temperature short-time annealing at 900 to 1200 ° C. is preferably adopted. |
| isCitedBy | http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-2003017498-A |
| priorityDate | 1996-03-29-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 27.