Predicate |
Object |
assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_80787665b837ed3eb503bbcd27c0043a |
classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-28 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-78 |
filingDate |
1996-02-01-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_9c08685d1818d60744e857ba9b0e0550 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_8e3262d7ae56e3ec1f5a0ed6c6204cf5 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_3568f3a0ec555ebf90d43b7219d95400 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_aa781a02dc77102bac516884f45129a3 |
publicationDate |
1997-08-15-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
publicationNumber |
JP-H09213955-A |
titleOfInvention |
Method for manufacturing semiconductor device |
abstract |
(57) Abstract: The resistance of an electrode is reduced without increasing a junction leakage current. Kind Code: A1 A gate sidewall spacer is formed of two kinds of insulating films that can be selectively etched, and a diffusion layer in which a conductive film is formed later and a silicon surface of a gate electrode are not exposed to a plasma atmosphere of dry etching. |
isCitedBy |
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/KR-100476666-B1 http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-2009246381-A http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-5047625-B2 http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-WO2006046274-A1 |
priorityDate |
1996-02-01-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
type |
http://data.epo.org/linked-data/def/patent/Publication |