| Predicate |
Object |
| assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_61080e1b5f97a1c2066cddcf8a2e877b |
| classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H04B2201-70707 |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H04L7-0054
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H04B1-70755
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H03L7-00 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H04L7-02
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H04L25-40
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H04L7-08 |
| filingDate |
1996-07-31-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_2f0c8125a4a67a8a15bb24fba155fa40
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_3c99600e4ee053295c32d9b2c925bbd6
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_8668021260cd84a8bc643e3598a2044d
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_5b8d8dcb5e66648794a71cb62f1f0886 |
| publicationDate |
1997-06-10-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
JP-H09153887-A |
| titleOfInvention |
Fast acquisition bit timing loop method and apparatus |
| abstract |
Kind Code: A1 Abstract: A method and method for obtaining bit synchronization while minimizing additional circuits and power consumption, and for obtaining bit synchronization while reducing the number of circuit components compared to prior art bit synchronization plans. Provide a device. A circuit for obtaining bit synchronization of a signal having a plurality of symbols contained therein, comprising: (A) a means for obtaining N samples of each of the symbols, (b) a means for determining the size of each of the samples, (c) an i-th (where i is 1 Range from 1 to N), means for obtaining a sum of the sizes of each of the samples, (d) means for determining the maximum of the sums of the sizes, (e) a maximum of the sums of the sizes And (f) means for adjusting bit synchronization in response to said comparing means, and (g) said aggregate obtaining means comprising: A circuit comprising means for avoiding an aggregate overflow of |
| isCitedBy |
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-2006254335-A
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-4551249-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-7706491-B2 |
| priorityDate |
1995-07-31-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |