| Predicate |
Object |
| assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_0950e9df7f0e1b73efee1bda859951ad |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-02164
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-0234
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-67248
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-02274
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-31612
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-31629
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-02131
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-02321
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-02271
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-3105
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-022
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-67017 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-3205
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-31
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-768
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-316
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-3105 |
| filingDate |
1995-10-03-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_f8675433e7e7fe27c550c2366df74386 |
| publicationDate |
1997-04-15-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
JP-H09102492-A |
| titleOfInvention |
Semiconductor device manufacturing method and semiconductor manufacturing apparatus |
| abstract |
Kind Code: A1 Abstract: A reflow insulating film obtained by adopting a reflow insulating film forming technique in an interlayer insulating film forming process in a multilayer wiring process of a semiconductor device has a high relative dielectric constant and excellent flatness. It is possible to realize the interlayer insulating film at low cost without performing the flattening process. SOLUTION: A step of forming a wiring pattern 32 on an insulating film 31 on a semiconductor substrate 30, and SiH 4 gas and H in a reaction chamber containing the semiconductor substrate after the wiring pattern is formed. 2 O 2 is introduced and reacted with each other in a temperature range of −10 ° C. or higher and + 10 ° C. or lower in a vacuum of 665 Pa or less to form a reflow SiO 2 film 341 having a reflow shape. Subsequently, a plasma treatment step of introducing NF 3 gas into the reaction chamber and performing plasma discharge in a predetermined vacuum to perform plasma treatment on the surface of the reflow SiO 2 film, and thereafter heat treatment of subjecting the semiconductor substrate to a predetermined heat treatment And a process. |
| isCitedBy |
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-2009539266-A
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-6194304-B1
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/KR-100322890-B1
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-6723628-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-6137176-A
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/KR-100256823-B1
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-6812123-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-6320264-B1
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-2010505281-A |
| priorityDate |
1995-10-03-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |