http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-H0878522-A
Outgoing Links
| Predicate | Object |
|---|---|
| assignee | http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_38520f366e74704305b34fb93a81121e http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_1926159cf6ea47836a5109402d6c8677 |
| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-314 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-316 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-312 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-31 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-205 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-768 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L23-522 |
| filingDate | 1994-09-02-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor | http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_8eb45089b7d58bbf5fa1364a6e579655 |
| publicationDate | 1996-03-22-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | JP-H0878522-A |
| titleOfInvention | Method for manufacturing semiconductor device |
| abstract | (57) [Abstract] [Purpose] O 3 -TE is used as an interlayer insulating film for a multilayer wiring structure. Provided is a method capable of effectively exhibiting the self-flatness and step-filling property of an O 3 -TEOS film when forming an OS film on a base. [Structure] An amorphous silicon film 13 having a thickness of about 30 nm is formed on the base 11 on which the lower layer wiring 11b is formed. On this amorphous silicon film 13, O 3 -TE The OS film 15 is formed. Plasma TEOS on substrate 11 A film is formed, a fas silicon film is formed thereon to a thickness of about 30 nm, and O 3 − is formed on the amorphous silicon film. A TEOS film may be formed. |
| priorityDate | 1994-09-02-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 21.