| abstract |
(57) [Abstract] [Purpose] To provide a memory card device in which the writing speed does not decrease even if the capacity of the data buffer is insufficient. [Structure] In a memory card device 1 having a data buffer 7, a plurality of data buffers 7 are provided, and a buffer switching circuit 12 for switching the data buffers 7 under the control of an access controller 5 is provided. [Effect] A plurality of data buffers 7 are alternately switched by the buffer switching means 12 so that data is read from the host CPU and the data buffer 7 is flash type. Since writing to the EEPROM 2 is performed at the same time, there is no waiting time other than waiting for erasing. |