http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-H08213894-A
Outgoing Links
Predicate | Object |
---|---|
assignee | http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_e5db580deca7130dbe51805c6c608b35 |
classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H03K17-693 |
filingDate | 1995-02-03-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
inventor | http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_c3323e01962da51dedcc944cd081295e |
publicationDate | 1996-08-20-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
publicationNumber | JP-H08213894-A |
titleOfInvention | Selection circuit |
abstract | (57) [Abstract] [Purpose] It is an object of the present invention to provide a dynamic selection circuit which selects input logic and operates at high speed with a small number of transistors. [Configuration] In a selection circuit for selecting and outputting one input logic from a plurality of input logics, a logic Q and its negative logic Q Assuming that the logic Q is preferentially output when Xs are simultaneously selected, it is assumed that there is no combination of input logics in which the logic of the input terminal A is Q and the negative logic QX is included in the other input terminals. The input terminal A is directly connected to the output terminal, the other plural input terminals are connected to the output terminal through the selection element, The selection element has a configuration selected by a selection signal. |
isCitedBy | http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-2016059041-A |
priorityDate | 1995-02-03-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 15.