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classificationIPCInventive http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-31
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filingDate 1994-11-11-04:00^^<http://www.w3.org/2001/XMLSchema#date>
inventor http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_2306fff5fb63648728946207148a761e
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publicationDate 1996-05-31-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber JP-H08139190-A
titleOfInvention Method for manufacturing semiconductor device
abstract (57) [Abstract] [Purpose] In a fine semiconductor device, a method for securing the filling property of a conductive material by eliminating an overhang of a base barrier layer formed by sputtering, and a second method for forming a film by sputtering. By redepositing the overhang of the conductive layer in the connection hole, the coverage is improved, the disconnection is prevented, the size of the stable connection hole is secured, the electrical characteristics, the yield and the reliability are improved, and it is practically used. And stable supply. [Structure] When electrically connecting wiring layers, a flattening method is used in which a conductive material is embedded in a connection portion and then an interlayer insulating film is etched back. Further, another conductive material is laminated between the embedded conductive material and the conductive layer. After forming the connection hole 14 on the first conductive layer 12 of the silicon substrate 11 and forming the barrier layer 15, the barrier layer 15 is sputter-etched, and subsequently W16 is formed. Vapor-deposited and then etched back to form W in the connection hole 14. While leaving 16, the second conductive layer 17 made of Al alloy or the like is formed to electrically connect the conductive layers.
isCitedBy http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-2009141230-A
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priorityDate 1994-11-11-04:00^^<http://www.w3.org/2001/XMLSchema#date>
type http://data.epo.org/linked-data/def/patent/Publication

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