http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-H0778885-A
Outgoing Links
Predicate | Object |
---|---|
assignee | http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_73ebc284a55d5daf0e209d6186c9e65c |
classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-8238 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H03K19-0185 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-092 |
filingDate | 1993-09-07-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
inventor | http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_be7bef19c5bf160d1bc783729dd65b50 |
publicationDate | 1995-03-20-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
publicationNumber | JP-H0778885-A |
titleOfInvention | C-MOS level shifter |
abstract | (57) [Summary] [Object] To provide a C-MOS level shifter circuit and structure which can be simply level-shifted, with little reduction in the degree of integration and without significantly increasing power consumption. [Structure] Concerning C-MOS level shifter, (1) CM Partially applying a back gate voltage as a DC voltage or a pulse voltage to the N well and P well of the OS integrated circuit, and (2) forming the N well and P well of the C-MOS integrated circuit separated from the substrate. What to do, and so on. P is a negative back gate voltage V BG1 to N-well to well positive back gate voltage V BG2 clock voltage CL The N-channel MOSFET and the P-channel MOSFET of this C-MOS inverter are applied by applying K1 and CLK2 or by applying a DC voltage. The threshold voltage can be increased in the positive or negative direction, and the operating voltage of a part of the C-MOS integrated circuit can be increased. |
isCitedBy | http://rdf.ncbi.nlm.nih.gov/pubchem/patent/WO-9854762-A1 http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-8390336-B2 http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-6774440-B1 |
priorityDate | 1993-09-07-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 36.