| abstract |
(57) [Abstract] [Purpose] It is possible to achieve planarization of a multilayer wiring structure by CMP (polishing) with high reliability. [Structure] A wiring material 13 is formed on an insulating film 12 on a silicon substrate 11, and the wiring material 13 is patterned to form a wiring 13A. At the same time, a dummy wiring 13B is formed in an area where the wiring 13A has a large interval. Form. The plasma nitride film 1 is formed on the surfaces of the wiring 13A and the dummy wiring 13B. 4 is formed, an interlayer insulating film 15 is formed thereon, and then the interlayer insulating film 15 is polished by a polishing method until the plasma nitride film 14 is exposed. The dummy wiring 13B increases the area of the plasma nitride film 14, enhances the polishing stopper function, prevents excessive polishing of the interlayer insulating film 15 and the like, and realizes planarization. |