http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-H07273112-A
Outgoing Links
| Predicate | Object |
|---|---|
| assignee | http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_d6402b23ab8782152be47b3996e48a4a |
| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-316 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-3213 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L23-52 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-3205 |
| filingDate | 1994-03-31-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor | http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_49795cdff51adc7bb999c15a00920332 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_a4618062037a93addb147dad6c2dc4ac http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_8617af1f51601ff095757e89ccfbfbc1 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_5287283691c8a2dd14c87687e6182f0d http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_e227b6d22e9b748c5cd56dc3911b2165 |
| publicationDate | 1995-10-20-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | JP-H07273112-A |
| titleOfInvention | Method for manufacturing semiconductor device having multilayer wiring structure, and semiconductor device having multilayer wiring structure |
| abstract | (57) [Summary] [Objective] To remove the antireflection film without eroding the underlying Al metal wiring layer. According to this manufacturing method, first, a base insulating film 20 and an Al alloy film 31 are formed on a Si substrate 10, and then an Al 2 O 3 film 33 as an antireflection film is formed thereon. Next, the Al 2 O 3 film 33 and Al are formed by a photolithography process. The alloy film 31 is patterned to form the lower metal wiring 30. Next, after forming the interlayer insulating film 40, the via hole 50 is formed in the interlayer insulating film 40 by RIE of a fluorine-based gas. Next, the Al 2 O 3 film 33 at the bottom of the via hole 50 is removed by plasma etching with chlorine-based gas. Then, by chemical vapor deposition, Al is selectively deposited in the via hole 50 to form the via plug 51. |
| isCitedBy | http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-6613680-B2 http://rdf.ncbi.nlm.nih.gov/pubchem/patent/KR-100464384-B1 http://rdf.ncbi.nlm.nih.gov/pubchem/patent/KR-100373351-B1 |
| priorityDate | 1994-03-31-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 34.