| abstract |
(57) [Abstract] [Purpose] MOS-FET source / drain regions (S XeCl excimer laser annealing for activating (/ D region) is performed without deforming the gate electrode. [Structure] Generally, the reflectance of a thin film changes at a cycle of λ / 2n (λ = wavelength, n = refractive index) due to the interference between incident light and reflected light, and the film thickness d at which the maximum reflectance is achieved. The film thickness difference d 1 between 3 and the film thickness d 2 at which the minimum reflectance is achieved is represented by λ / 4n. Therefore, the first electrode having the film thickness d 1 is previously formed on the gate electrode 7a. Of SiO 2 film pattern 8a is formed, and thereafter, the film thickness of the antireflection film on the gate electrode 7a is d 3 , and the film thickness on the S / D region (high-concentration impurity diffusion region 11 and LDD region 9) is d 2 Then, the second SiO 2 film 12 is formed on the entire surface of the wafer. Even under the condition that the S / D region is sufficiently heated, heat generation of the gate electrode 7a is suppressed, and its deformation can be prevented. |