http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-H06223560-A
Outgoing Links
| Predicate | Object |
|---|---|
| assignee | http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_5d7576285d411d00c697e07270d2814a |
| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G11C11-401 |
| filingDate | 1993-01-29-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor | http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_b9e4be2bc054d57cf5ec46d1e0941dfa |
| publicationDate | 1994-08-12-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | JP-H06223560-A |
| titleOfInvention | Semiconductor memory device |
| abstract | (57) [Abstract] [Purpose] To provide a video RAM in which the old mask register and the stop register can be independently cleared, a part of the memory cell array can be rewritten at high speed, and unnecessary data transfer is not performed. . [Structure] Reset signals RST1 and RST are independently provided to the old mask register 17 and the stop register 23. A reset signal generation circuit 50 that provides 2 is provided. Also, Mask means FWM0 to FWM such as a transmission gate that can be arbitrarily controlled in the flashlight bus 20. n is provided. Further, mask means DTM0 such as a transmission gate which can be arbitrarily controlled in the data transfer bus. .About.DTMn and divided data transfer buses SDTB0 to SDTBm capable of being divided into a certain number of lines and brought into a conductive state. Further, the data is transferred to the serial register 7 for each boundary. |
| isCitedBy | http://rdf.ncbi.nlm.nih.gov/pubchem/patent/EP-2583872-A1 |
| priorityDate | 1993-01-29-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 36.