http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-H06188725-A
Outgoing Links
Predicate | Object |
---|---|
assignee | http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_3a62c92e56568bd104089aac22ca487b |
classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H03K19-1737 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H03K19-177 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H03K19-17796 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G06F15-16 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H03K19-17704 |
classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H03K19-177 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H03K19-173 |
filingDate | 1993-08-02-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
inventor | http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_10322b61a54508a70ed233274abc5e3e |
publicationDate | 1994-07-08-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
publicationNumber | JP-H06188725-A |
titleOfInvention | Integrated circuit |
abstract | (57) Abstract: To provide an architecture for a programmable logic device (PLD) that is scalable from low density to very high density. [Structure] Two or more programmable logic blocks (P LBs (201A) are interconnected by a programmable switch matrix including a programmable input switch matrix (220A) and a programmable centralized switch matrix (230). Each PL B is coupled to a plurality of programmable I / O macrocells (203A) by an output switch matrix (240A). Each I / O macrocell is connected to one of a plurality of I / O pins (205A). The programmable input switch matrix uniformly processes all fieldback signals to the programmable centralized switch matrix to simplify signal routing and improve functionality and resource utilization within the PLD. |
isCitedBy | http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-2021508131-A |
priorityDate | 1992-08-03-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 73.