http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-H05282892-A

Outgoing Links

Predicate Object
classificationIPCInventive http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G11C29-00
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-10
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-82
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G01R31-26
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G11C29-04
filingDate 1992-04-02-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationDate 1993-10-29-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber JP-H05282892-A
titleOfInvention Semiconductor memory device
abstract (57) [Abstract] [Purpose] In a semiconductor memory device having a redundant circuit, an inspection selection time including a defective product repair process is shortened, and an inspection cost is reduced. [Constitution] Unless the fuse 302 of the program circuit 3 is blown, the node P is set to "High" level, and the node Q is set to "L" which is the inversion level of the node P by the inverter. Since the "low" level appears and one of the inputs of the NAND gate is always set to the "Low" level, the output of the test output terminal 4 is "regardless of the input from the test input terminal 1". When the fuse 302 is blown, the node P is at "Low" level and the node Q is at "Low" level. Goes to the "High" level, and one of the inputs of the NAND gate is at the "High" level, so if the test input terminal 1 is at the "High" level, the A "Low" level is output. Therefore, it can be discriminated whether or not the product is non-defective by the state of the program circuit.
isCitedBy http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-6035430-A
priorityDate 1992-04-02-04:00^^<http://www.w3.org/2001/XMLSchema#date>
type http://data.epo.org/linked-data/def/patent/Publication

Incoming Links

Predicate Subject
isDiscussedBy http://rdf.ncbi.nlm.nih.gov/pubchem/substance/SID419506136
http://rdf.ncbi.nlm.nih.gov/pubchem/compound/CID3325

Total number of triples: 15.