http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-H05235133-A

Outgoing Links

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assignee http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_e757fd4fedc4fe825bb81b1b466a0947
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http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G01B7-34
filingDate 1992-08-13-04:00^^<http://www.w3.org/2001/XMLSchema#date>
inventor http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_e8cfd56434d78c19839fa10d920d2f78
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_c605d74c051950d663b79be02c458339
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_89b9f5c93ddb29379fa91a8501339da8
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_cdb7703e438e3786c7a6370cb5497e11
publicationDate 1993-09-10-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber JP-H05235133-A
titleOfInvention Controlling large-scale topography on silicon wafers
abstract (57) Summary An object of the present invention is to provide a method for characterizing large-scale wafer topography that is crucial for device yield. According to the present invention, a method for characterizing large-scale wafer topography is applied to improve yield in the manufacture of large-scale integrated (LSI) devices. First, the heights of the center, edges, and midpoints are measured on four or more, preferably eight equally spaced radii. This gives, for example, 8 values each for Y s and Y e and averages them. The shape angle α and the absolute shape value M are then calculated and the values of α and M obtained are correlated with the properties of the individual wafers in terms of device performance and yield. Based on these results, wafer processing is controlled so that optimum wafer characteristics are obtained.
isCitedBy http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-2010141078-A
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/KR-20010104659-A
priorityDate 1991-10-09-04:00^^<http://www.w3.org/2001/XMLSchema#date>
type http://data.epo.org/linked-data/def/patent/Publication

Incoming Links

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Total number of triples: 24.