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filingDate 2008-08-29-04:00^^<http://www.w3.org/2001/XMLSchema#date>
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publicationDate 2013-10-30-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber JP-5330772-B2
titleOfInvention Semiconductor integrated circuit and operation method thereof
abstract The power consumption of a data sampling unit that selects a phase of a clock signal appropriate for sampling payload data is reduced at an input interface. A semiconductor integrated circuit includes an input interface and internal core circuits. The input interface includes a hysteresis circuit and a data sampling unit. The hysteresis circuit detects an input signal between first and second input thresholds as a sleep command. The data sampling unit selects an appropriate phase of a sampling clock signal in accordance with a synchronizing signal and samples payload data. When a sleep command is detected, a sleep signal is also supplied to the internal core circuits and the data sampling unit and they are controlled into a low-power consumption state.
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