http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-4962301-B2
Outgoing Links
| Predicate | Object |
|---|---|
| classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C7-1006 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C8-10 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C7-109 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C7-1078 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C7-1084 |
| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H03K19-00 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H03K19-003 |
| filingDate | 2007-12-25-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| grantDate | 2012-06-27-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationDate | 2012-06-27-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | JP-4962301-B2 |
| titleOfInvention | Semiconductor integrated circuit and system |
| abstract | The semiconductor integrated circuit comprises: a first buffer circuit that outputs a first output signal to an output terminal on receipt of a first input signal; a second buffer circuit that includes a circuit having a similar configuration to the first buffer circuit, that outputs a second output signal on receipt of the first input signal, and that outputs the second output signal based on a check signal; a third buffer circuit that outputs a third output signal based on the check signal; a determination circuit that receives the second output signal and the third output signal and activates a detection signal, in response to the detection that the second output signal is behind the third output signal; and a fourth buffer circuit that operates during the activation of the detection signal and outputs the third output signal to the output terminal, on receipt of the first input signal. |
| priorityDate | 2007-12-25-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 64.