| abstract |
A chip-size package and, in particular, a packaging technique which is suitable for connection of high density and high reliability and suitable for low-cost packages. A chip (10) is bonded facedown for connection to a laminated wiring substrate (20) of the same size as that of the chip through direct-through holes (30), and the gap between ghe chip and the laminated wiring substrate is filled with an underfill (40). The chip is connected to external terminals (50) through wirings (21-24) and via holes (31), and is covered with an encapsulant (60) except for an opening (61). Chip connection and high density array connection of terminals are enabled, delay and noise are reduced by low permittivity and shortening of internal wiring length, and stress resistance and reliability against humidity are improved. |