http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-3414770-B2
Outgoing Links
| Predicate | Object |
|---|---|
| classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H03K19-1737 |
| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H03K19-173 |
| filingDate | 1992-04-24-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| grantDate | 2003-06-09-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationDate | 2003-06-09-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | JP-3414770-B2 |
| titleOfInvention | Architecture of Dense Erasable Programmable Logic Devices Using Multiplexer Interconnect |
| priorityDate | 1991-04-25-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 28.