http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-2021036663-A

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filingDate 2020-07-16-04:00^^<http://www.w3.org/2001/XMLSchema#date>
inventor http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_54231f26b32dbecad84ff8582684393e
publicationDate 2021-03-04-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber JP-2021036663-A
titleOfInvention Systems and methods for reference settling
abstract PROBLEM TO BE SOLVED: To provide a system and a method for reference settling supporting a high slew rate and a wide band width. A digital-to-analog conversion circuit 302 includes a split type MSB capacitor bank 402 and an LSB capacitor bank 404. The MSB capacitor bank 402 includes capacitors 421-1 to 421-n that are selectively coupled to a coarse reference voltage Vrefcoarse or a fine reference voltage Vreffine. The LSB capacitor bank 404 includes capacitors 422-1 to 422-m that are selectively coupled to the crude reference voltage Vrefcorase. [Selection diagram] Fig. 4
priorityDate 2019-07-17-04:00^^<http://www.w3.org/2001/XMLSchema#date>
type http://data.epo.org/linked-data/def/patent/Publication

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Total number of triples: 21.