| Predicate |
Object |
| classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G09G2310-0281
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G09G2300-0876
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G02F1-134372
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G02F1-133388
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G09G2310-0286
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G09G2320-0252
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G09G2300-0413
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G09G2300-0426
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G09G2320-0223
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G09G2300-0408 |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G09G3-20
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G09G3-36
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G09G3-3677
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G02F1-136286
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G02F1-1362
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G02F1-136213 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G09F9-35
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G02F1-1368
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G09F9-30 |
| filingDate |
2018-04-11-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationDate |
2020-11-05-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
JP-2020531873-A |
| titleOfInvention |
Array board and display device |
| abstract |
The array substrate includes a plurality of gate lines (GL), a plurality of data lines (DL) intersecting the gate lines (GL), and a first gate drive circuit, and the first gate drive circuit is non-existent. It includes a plurality of shift register circuits located in the active region (11). The plurality of gate lines (GL) and the plurality of data lines (DL) are included in a plurality of sub-pixels (22) in the active region (10) and in an inactive region (11) adjacent to the active region (10). A plurality of dummy sub-pixels (21) can be defined. The first gate drive circuit (20) may be farther from the active region (10) than the plurality of dummy sub-pixels (21). At least one of the plurality of dummy sub-pixels (21) can include an auxiliary capacitor (40). The shift register circuit in the first gate drive circuit (20) can be coupled to the auxiliary capacitor (40). The auxiliary capacitor (40) can form at least a portion of the bootstrap capacitor (Cst) in the shift register circuit. [Selection diagram] Fig. 3 |
| isCitedBy |
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/WO-2022229790-A1 |
| priorityDate |
2017-08-21-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |