http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-2020520110-A
Outgoing Links
| Predicate | Object |
|---|---|
| classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-66666 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-6656 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-0649 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-41741 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-7827 |
| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-336 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-786 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-78 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-417 |
| filingDate | 2018-04-19-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationDate | 2020-07-02-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | JP-2020520110-A |
| titleOfInvention | Method and semiconductor device for forming a semiconductor device with reduced bottom contact resistance of a VFET |
| abstract | A method and resultant structure for a vertical field effect transistor (VFET) having reduced bottom contact resistance. A multi-layer lower doped region having alternating doped layers and doped sacrificial layers is formed on a substrate. By removing a portion of the doped sacrificial layer, one or more cavities are formed. A bottom contact is formed over the multilayer bottom doped region. The bottom contact includes one or more conductive flanges that fill the cavity. [Selection diagram] Fig. 16 |
| isCitedBy | http://rdf.ncbi.nlm.nih.gov/pubchem/patent/WO-2022130451-A1 |
| priorityDate | 2017-05-16-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 86.