| Predicate |
Object |
| assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_58054227722081749d7e8e121924a5c8 |
| classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C16-0483
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10B69-00 |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10B43-27
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C7-04
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G06F3-0659
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C16-26
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G06F3-0679
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G06N3-04
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G06F3-0604
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G06N3-063
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G06N3-048
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10B41-27
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G06N3-08
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C16-3495
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G06N3-084 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G11C16-30
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G11C16-08
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G11C16-04
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G06N3-02
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G11C11-56 |
| filingDate |
2019-03-05-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_9a4266315d7e4e73ce9927bd32ef52b0
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_ab2f44ace02b1f9feb69623075ea2b53
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_862068c5f3b74b565f53db0ae2b006e7
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_bab71c9493d1d0d2e2fafaf469052c3c
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_f7e2c898cfc8dc97d644b1e5f39201ce |
| publicationDate |
2020-09-10-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
JP-2020144958-A |
| titleOfInvention |
Memory system and method |
| abstract |
PROBLEM TO BE SOLVED: To provide a memory system having improved accuracy of estimation of a read voltage. According to one embodiment, a plurality of memory cells and a memory controller are provided. The memory controller acquires a histogram showing the number of memory cells with respect to the threshold voltage by reading a plurality of memory cells using one or more reference read voltages. The memory controller then inputs the histogram into a trained neural network model with an output layer that outputs one or more real read voltages for reading data stored in a plurality of memory cells. Then, the memory controller reads a plurality of memory cells using one or more actual read voltages output from the output layer. [Selection diagram] Fig. 6 |
| priorityDate |
2019-03-05-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |