http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-2020065075-A
Outgoing Links
Predicate | Object |
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assignee | http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_f56b5174f7d196258707ccf1d609796e |
classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-3205 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L23-522 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L23-532 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-768 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-822 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-04 |
filingDate | 2020-01-08-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
inventor | http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_8a2bf3fa15307920db6945958d1d0b4b http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_223296b5c52ec11038658688a98e91e1 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_c53ba56e634b5e197766fd219c227d78 |
publicationDate | 2020-04-23-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
publicationNumber | JP-2020065075-A |
titleOfInvention | Semiconductor device |
abstract | PROBLEM TO BE SOLVED: To provide a semiconductor device capable of more simply and inexpensively manufacturing a semiconductor device including a highly accurate oscillator. In a metal resistance element formation region of a semiconductor device, a pair of first and second wiring layers M1 adjacent to each other formed on a main surface of a substrate via a first insulating film SO11 includes a second wiring layer M1 and a second wiring layer M2. The first and second conductive layers CP1 in the insulating film SO12 are connected to a pair of third and fourth wiring layers M2 adjacent to each other formed on the second insulating film SO12. A metal resistance element layer Rmn is formed on the third and fourth wiring layers and the second insulating film between them so as to cover the upper surfaces and side surfaces of the third and fourth wiring layers. . The first and second conductive layers can be formed using the same mask as the contact plug CP1 in the wiring region, and the manufacturing cost can be reduced. The third and fourth wiring layers are covered with the metal resistance element layer. [Selection diagram] Fig. 41 |
priorityDate | 2020-01-08-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 53.