| Predicate |
Object |
| assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_dd42f36a16e57d505d65f13c4db69c55 |
| classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H03M1-468 |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H03M1-1245
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H03M1-466
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H03K5-2481
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H03M1-0612 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H03M1-80
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H03K5-08
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H03M1-46 |
| filingDate |
2018-06-18-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_6f2f3db70a32efd98235d5a9c5df8d2c |
| publicationDate |
2019-12-26-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
JP-2019220780-A |
| titleOfInvention |
Comparator and AD converter |
| abstract |
An object is to suppress occurrence of a conversion error. A first and a second transistor to which an input analog potential is applied to at least one input transistor, and a drain of the first and second transistors during a period when the input analog potential is applied. A first circuit having a third transistor for short-circuiting between sources, and a first output analog potential and a second output analog potential output from the first circuit based on the input analog potential. And a second circuit that outputs a signal indicating a magnitude relationship. [Selection diagram] FIG. |
| isCitedBy |
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/WO-2022137821-A1 |
| priorityDate |
2018-06-18-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |