http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-2019216202-A

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classificationIPCInventive http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G01R31-26
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-336
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-78
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filingDate 2018-06-14-04:00^^<http://www.w3.org/2001/XMLSchema#date>
inventor http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_bcc5708c0c64a819e5cb4947b8d05ac4
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publicationDate 2019-12-19-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber JP-2019216202-A
titleOfInvention Method for manufacturing silicon carbide semiconductor device and silicon carbide semiconductor inspection device
abstract In a silicon carbide semiconductor device including a MOSFET having a source region on an upper surface of a substrate and a drain region on a rear surface of the substrate, a time required for a test for determining the presence or absence of a crystal defect as a threading dislocation is reduced. Reduce the manufacturing cost of silicon semiconductor devices. Kind Code: A1 A negative voltage is applied between a gate and a source from a negative voltage applying unit, and a positive voltage of 1 kV or more and a rated voltage or less is applied between a drain and a source from a positive voltage applying unit. , The gate current and the drain current are measured using the ammeters 45 and 46. [Selection] Figure 15
isCitedBy http://rdf.ncbi.nlm.nih.gov/pubchem/patent/WO-2022202076-A1
priorityDate 2018-06-14-04:00^^<http://www.w3.org/2001/XMLSchema#date>
type http://data.epo.org/linked-data/def/patent/Publication

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Total number of triples: 20.