Predicate |
Object |
assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_f56b5174f7d196258707ccf1d609796e |
classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10B41-10 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10B41-30 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10B43-40 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C16-14 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10B43-10 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C16-26 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10B43-30 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C16-0466 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C16-10 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-40117 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C16-3495 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10B43-23 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-42344 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-42328 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C16-0425 |
classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-11568 |
filingDate |
2018-06-08-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_fd074e359fb4f797739c44b0360dcdbd http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_cb03f4dad83776af30af72fe70fa6ba1 |
publicationDate |
2019-12-12-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
publicationNumber |
JP-2019212857-A |
titleOfInvention |
Semiconductor device and manufacturing method thereof |
abstract |
In a semiconductor device having a plurality of memory regions each composed of a split gate type MONOS memory, a threshold voltage of a memory cell is set to a different value for each memory region. A metal film that is a work function film constituting a memory gate electrode of a memory cell in a data area and a metal film that is a work function film constituting a memory gate electrode of a memory cell in a code area are mutually connected. By forming with different materials or with different thicknesses, memory cells having different threshold voltages are formed. [Selection] Figure 4 |
priorityDate |
2018-06-08-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
type |
http://data.epo.org/linked-data/def/patent/Publication |