| abstract |
The present invention provides a semiconductor device which is suitable for miniaturization, has high reliability, and has improved operation speed. A semiconductor device includes a memory cell array 300 and a peripheral circuit 500, and layers 291 and 294 include transistors. The layers 292, 293, 295, 296 have conductive layers. The transistors 198 and 199 are so-called dummy transistors which are not included in any sub memory cell. By providing the transistors 198 and 199, the layer 299 can be manufactured using the same mask as the layer 294 and the like, and the number of masks necessary can be reduced. In the case where a lithography process is used to manufacture the memory cell array 300, the conditions such as the distance between the patterns can be made common by forming the layers 294 and 299 using the same mask, and the layers 294 and 299 are minute It becomes easy to form a pattern. [Selected figure] Figure 8 |