http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-2019091845-A
Outgoing Links
Predicate | Object |
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assignee | http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_b55c349b43c3ecba4977fd52cc8f8c67 |
classificationCPCAdditional | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2224-96 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2224-12105 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2224-214 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2924-18162 |
classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/C09J7-38 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-52 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/B32B27-00 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L24-96 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-56 |
classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/C09J7-20 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/B32B27-00 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-56 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-52 |
filingDate | 2017-11-16-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
inventor | http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_d4f1ed54832b5cf422a2565f9c0bfd88 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_0014a1119c9a39af1795c49594cafe4e http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_12bc5b00c78815f2dd10b721001423d3 |
publicationDate | 2019-06-13-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
publicationNumber | JP-2019091845-A |
titleOfInvention | Semiconductor process sheet and semiconductor package manufacturing method |
abstract | The present invention provides a semiconductor process sheet and a semiconductor package manufacturing method suitable for efficiently manufacturing a semiconductor package. A semiconductor process sheet X of the present invention includes a double-sided pressure-sensitive adhesive sheet 10 and a partial sealant layer 20. The double-sided pressure-sensitive adhesive sheet 10 includes a substrate 11, a pressure-sensitive adhesive layer 12 of reduced adhesive strength, and a pressure-sensitive adhesive layer 13, for example, in a laminated structure between the adhesive surfaces 10a and 10b. The partial sealant layer 20 is located on the adhesive surface 10 b of the double-sided adhesive sheet 10. In the semiconductor package manufacturing method of the present invention, a step of mounting a plurality of semiconductor chips on the partial sealant layer 20 of the semiconductor process sheet X in which the adhesive surface 10a is bonded to a support, and embedding the semiconductor chips A step of curing the supplied sealant and the partial sealant layer 20 to form a sealant portion, a step of separating the sealant portion and the adhesive surface 10b, a wiring structure portion on the sealant portion The forming process includes a process of dividing the sealing material portion and the wiring structure portion into semiconductor chips. [Selected figure] Figure 1 |
isCitedBy | http://rdf.ncbi.nlm.nih.gov/pubchem/patent/KR-20220148088-A |
priorityDate | 2017-11-16-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 247.