| abstract |
An object of the present invention is to provide a memory device with an extremely long data retention period with a reduced occupied area as much as possible. An extremely small leak current transistor is used as a cell transistor of a memory element in a memory device. Further, in order to reduce the occupied area of the memory cell, the source and drain of the transistor may be stacked in the vertical direction in the region where the bit line and the word line intersect. Furthermore, the capacitor may be stacked above the transistor. [Selected figure] Figure 1 |