| abstract |
PROBLEM TO BE SOLVED: To shorten the time taken for a write operation. A semiconductor memory device according to an embodiment includes first and second planes, a first latch circuit holding a page input from the outside, and a page transferred from the first latch circuit and including a first bit. A second latch circuit for holding, a third latch circuit for holding a page transferred from the first latch circuit and including a second bit, a fourth latch circuit for holding a page input from the outside, and a fourth latch circuit And a sixth latch circuit for holding the page including the second bit and transferred from the fourth latch circuit, and a control circuit for controlling the write operation. And. The control circuit 24 receives the first command sequence including the first command, the address, the data, and the second command from the outside in parallel with the first process and receives the first latch circuit to the second latch circuit or the third latch circuit. Execute the second process of transferring data to [Selected figure] Figure 9 |