http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-2018160494-A
Outgoing Links
| Predicate | Object |
|---|---|
| assignee | http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_f56b5174f7d196258707ccf1d609796e |
| classificationCPCAdditional | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-02238 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-02255 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-28167 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76224 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-088 |
| classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-823481 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-7833 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-7838 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-0206 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76202 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-6659 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-66568 |
| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-318 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-78 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-336 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-304 |
| filingDate | 2017-03-22-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor | http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_8fe452d08df1aea3079ed30525745091 |
| publicationDate | 2018-10-11-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | JP-2018160494-A |
| titleOfInvention | Semiconductor device and manufacturing method of semiconductor device |
| abstract | An object of the present invention is to suppress the occurrence of defects due to foreign matters generated in the course of a manufacturing method adhering to a region where a semiconductor element is formed. A method of manufacturing a semiconductor device according to an embodiment includes a step of forming a gate insulating film on a surface of a semiconductor substrate, and the surface is sandwiched between a source region, a drain region, and a source region and a drain region. Forming at least one semiconductor element having a portion of the semiconductor substrate and a gate electrode facing each other with a gate insulating film interposed therebetween; forming a first film on the surface; and washing the semiconductor substrate with an acidic solution And a step of performing. The first film is made of a material that is charged to a potential opposite to that of the material constituting the semiconductor substrate in the acidic solution. The step of forming the first film is performed before the step of forming the gate insulating film. The first film is formed so as to be located in a non-active region that does not overlap in plan view with a portion where the source region is formed, a portion where the drain region is formed, and a portion where the gate electrode is formed. [Selection] Figure 3 |
| priorityDate | 2017-03-22-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 29.