http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-2018078330-A

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filingDate 2018-01-15-04:00^^<http://www.w3.org/2001/XMLSchema#date>
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publicationDate 2018-05-17-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber JP-2018078330-A
titleOfInvention Modular approach to reduce MOSFET flicker noise
abstract A module technique for reducing flicker noise in a metal oxide semiconductor field effect transistor (MOSFET) in a device is provided. Initially, a circuit designer selects one or more surface channel MOSFETs in the device. The one or more surface channel MOSFETs are then converted to one or more buried channel MOSFETs to reduce flicker noise. One or more masks may be applied to the channel (s) of one or more surface channel MOSFETs. This technique can be used for the input (s) of operational amplifiers, specifically rail-to-rail operational amplifiers, and other analog and digital circuits such as mixers, ring oscillators, current mirrors. [Selection] Figure 10
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