| abstract |
A semiconductor device having a configuration capable of operating a GGMOS more uniformly while making a parasitic PNP transistor easier to operate is provided. A cathode electrode and a Schottky contact are formed by setting a low N-type impurity concentration in the N-type body region while arranging a plurality of N-type body regions in one cell of the GGMOS. To be allowed to. Specifically, a plurality of N-type body regions 5 are arranged so as to surround the cells constituting the GGMOS. Thereby, the body contact resistance can be increased and the base resistance can be increased, so that the parasitic PNP transistor can be turned on earlier. Therefore, it is possible to accurately suppress a surge current from flowing to the protected element. [Selection] Figure 3 |