| abstract |
A semiconductor device in which a parasitic resistance value is reduced and a decrease in on-state current is suppressed is manufactured. An oxide semiconductor layer is formed, a gate insulating layer is formed over the oxide semiconductor layer, a gate electrode layer overlapping with the oxide semiconductor layer is formed with the gate insulating layer interposed therebetween, and the gate insulating layer and the gate are formed. A first insulating layer is formed so as to cover the electrode layer, an impurity element is introduced from the first insulating layer, a pair of impurity regions is formed in the oxide semiconductor layer, and the first insulating layer is formed over the first insulating layer. And forming a sidewall insulating layer in contact with the side surface of the gate electrode layer, and forming a source electrode layer in contact with the pair of impurity regions. And a drain electrode layer is formed. [Selection] Figure 1 |