| abstract |
A method and structure for improving the performance of an integrated semiconductor transistor operating at high frequency and / or high power. Two capacitors are connected to the input of a semiconductor transistor and tuned to suppress second harmonic generation and to convert and match the input impedance of the device. A two-step tuning procedure is provided. The transistor can include gallium nitride. The transistor can be configured as a power transistor capable of handling power up to 1000W. Tuning transistors can operate at frequencies up to 6 GHz with peak drain efficiencies greater than 60%. [Selection] Figure 5 |