http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-2017055365-A
Outgoing Links
| Predicate | Object |
|---|---|
| assignee | http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_1af8df51ce24ca931ae718fb747f6aa0 |
| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H04N5-378 |
| filingDate | 2015-09-11-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor | http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_b9ecd1492ff6d524759e545192e6f414 |
| publicationDate | 2017-03-16-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | JP-2017055365-A |
| titleOfInvention | Solid-state imaging device and imaging system |
| abstract | A technique advantageous in synchronizing the operation timing of each circuit included in a solid-state imaging device when outputting pixel signals of a plurality of pixels to a plurality of signal lines with a phase shifted from each other. A first clock signal, a second pixel, and a second clock signal CLK2 having the same period as the first clock signal CLK1 and having a phase different from that of the first clock signal are received by the first pixel. A clock generation circuit 170 that generates a signal based on the first clock signal, a first signal line, a second signal line, and a pixel signal of the first pixel are output to the first signal line according to the first clock signal. The readout circuit 121 for outputting the pixel signal of the second pixel to the second signal line in accordance with the first clock signal; the pixel signal of the first pixel of the first signal line; and the second of the second signal line. And a multiplexer 140 that performs an operation of serially outputting the pixel signal of each of the pixels in accordance with the second clock signal. [Selection] Figure 1 |
| priorityDate | 2015-09-11-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 35.