http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-2016162466-A

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publicationDate 2016-09-05-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber JP-2016162466-A
titleOfInvention Semiconductor memory device and memory system
abstract A semiconductor memory device and a memory system capable of improving the reliability of a read operation are provided. In the semiconductor memory device according to the embodiment, the first to third memory cell transistors MT commonly connected to the first word line WL are connected to the first word line WL via the first to third bit lines BL, respectively. Connected to the first to third sense amplifier units SAU. The first and second sense amplifier units SAU connected to the adjacent first and second memory cell transistors MT are connected in common to the first signal line IO, and input / output data in different cycles, The third sense amplifier unit SAU is connected to the second signal line IO, and inputs / outputs data in the same cycle as the first sense amplifier unit. [Selection] Figure 10
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