| abstract |
The reliability of a semiconductor device is improved. In one embodiment, an element isolation region STI extending in the X direction intersects with a memory gate electrode MG extending in a Y direction orthogonal to the X direction in plan view. Have At this time, in the intersection region R1, the width ES1 in the Y direction of one end located on the source region SR side is larger than the width ES2 in the Y direction on the other end located on the control gate electrode side. [Selection] Figure 26 |