http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-2016005075-A

Outgoing Links

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classificationCPCInventive http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C7-1057
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C7-1084
classificationIPCInventive http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G11C11-4093
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H03K19-0175
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G11C11-407
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G11C11-401
filingDate 2014-06-16-04:00^^<http://www.w3.org/2001/XMLSchema#date>
inventor http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_30644991852c11af2ddc5f5acb9dde50
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_feb8d6236753583df2bf0643873a0278
publicationDate 2016-01-12-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber JP-2016005075-A
titleOfInvention Semiconductor device
abstract In a write operation involving a termination operation, a sufficient amplitude of write data is ensured. An input buffer IB connected to a data input / output terminal DQ and activated during a write operation, an output buffer OB connected to a data input / output terminal DQ and activated during a read operation and a write operation, and an output buffer And a switching circuit 49 for supplying the impedance code ZQCODE3 to the OB. The switching circuit 49 sets the impedance code ZQCODE3 to the first value during the read operation, and sets the impedance code ZQCODE3 to the second value during the write operation. According to the present invention, it is possible to sufficiently ensure the amplitude of write data even when the data transfer rate is high. [Selection] Figure 2
priorityDate 2014-06-16-04:00^^<http://www.w3.org/2001/XMLSchema#date>
type http://data.epo.org/linked-data/def/patent/Publication

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Total number of triples: 20.