| Predicate |
Object |
| assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_6b822ee046eb6c45d1e3bd9ce9c1782e |
| classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10B12-00
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C11-404
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C11-405 |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C11-417
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C11-412 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-336
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-11
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-786
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G11C11-41
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G11C11-412
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-8244 |
| filingDate |
2014-10-28-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_21afd2ac70d749984ee471aa8e93dc11
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_8bb761a089dba691e10fe050a316ea73 |
| publicationDate |
2015-06-18-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
JP-2015111485-A |
| titleOfInvention |
Driving method of semiconductor device |
| abstract |
A semiconductor device which can operate normally even when a transistor is miniaturized is provided. An SRAM for storing data in an inverter loop composed of a CMOS inverter, a transistor electrically connected to each of an input terminal and an output terminal of the CMOS inverter, and a capacitor electrically connected to the transistor In a configuration in which a potential corresponding to data is held at a node between the transistor and the capacitor element in a period in which power supply to the CMOS inverter is stopped, a low power supply is provided in the period in which power supply is stopped. The potential of the wiring that provides the potential is switched to the same potential as the high power supply potential, the potential of the input terminal and the output terminal of the CMOS inverter is set equal to the high power supply potential, and the potential corresponding to the data held in the node is input to the CMOS inverter. Supply power to the terminal and output terminal to resume power supply. [Selection] Figure 2 |
| isCitedBy |
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-11094373-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-2015118724-A
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-WO2017158465-A1
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-10249347-B2 |
| priorityDate |
2013-10-31-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |